Jiawen Wu

realjw@tamu.edu
Texas A&M University
WEB 102, College Station, TX, USA
Jiawen Wu Profile Picture

About Me

Hi there! Welcome to Jiawen's homepage.

I am a Ph.D. Student in the Department of Electrical and Computer Engineering at Texas A&M University, advised by Prof. Jeyavijayan (JV) Rajendran. I began my doctoral studies in Fall 2023.

My research interests are focused on hardware security, computer architecture, zero-knowledge proofs (ZKP), hardware accelerators, LLM agents for electronic design automation (EDA), and their intersections.

I serve as a reviewer for IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IEEE PES Transactions on Smart Grid.

Education

Ph.D. in Computer Engineering, Texas A&M University

College Station, TX
Aug 2023 – Jun 2028 (Expected)

B.S. in Electrical Engineering, Tianjin University

Tianjin, China
Aug 2019 – Jun 2023

Publications

EDATracer: An Agentic Framework for Large-Scale EDA Artifact Analysis

Phat Tieu, Sayanti Jana, Matthew DeLorenzo, Jiawen Wu, Narendran Srinivasan, Srinivas Shakkottai, Jiang Hu, Jeyavijayan Rajendran
arXiv preprint arXiv:2608.04032, 2026

Hardware Acceleration of XMSS for CNSA 2.0 Migration on Low-Cost FPGAs

Joshua Ennis, Jiawen Wu, Jeyavijayan Rajendran
Government Microcircuit Applications & Critical Technology Conference (GOMACTECH), 2026

ChipZK: A Trusted Computing Infrastructure for Chiplets Using Zero-Knowledge Proofs

Jiawen Wu, Jeyavijayan Rajendran
SRC TECHCON, 2025

Performance Analysis of Zero-Knowledge Proofs

Saichand Samudrala, Jiawen Wu, Chen Chen, Haoxuan Shan, Jonathan Ku, Yiran Chen, Jeyavijayan Rajendran
IEEE International Symposium on Workload Characterization (IISWC), 2024

ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM

Jonathan Ku, Junyao Zhang, Haoxuan Shan, Saichand Samudrala, Jiawen Wu, Qilin Zheng, Ziru Li, Jeyavijayan Rajendran, and Yiran Chen
Proceedings of the 61st ACM/IEEE Design Automation Conference (DAC), 2024

Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array

Jianan Mu, Huajie Tan, Jiawen Wu, Haotian Lu, Chip-Hong Chang, Shuai Chen, Shengwen Liang, Jing Ye, Huawei Li, Xiaowei Li
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023

PFDCT: An Enhanced Transport Layer Protocol for Precise Flow Control in Data Centers

Zhuo Li, Huiyan Wang, Xiangdong Yi, Xinyi Zhang, Jiawen Wu, Yubin Zhang, Peng Luo, Kaihua Liu
Electronics 12 (8), 2023

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